1. Field of the Invention
The present invention relates to a circuit, semiconductor device, and method for enhancing the test efficiency of function modules. In particular, the present invention relates to a technique capable of testing a plurality of function modules included in a semiconductor device including a plurality of function modules having the same function, efficiently by using a simple configuration.
2. Description of the Background Art
As frequently seen in conventional system processors, there are many semiconductor devices each having.a plurality of circuits having the same function (hereafter referred to as function modules), such as a plurality of CPUs having the same function. As methods for rationally testing a plurality of function modules of these semiconductor devices, two methods described hereafter have been used heretofore.
A first method is a method of serially testing a plurality of function modules, i.e., a method of repeating the same test as many times as the number of function modules. In the first method, the test is conducted repetitively for respective function modules. Therefore, the first method has an advantage in that external input/output pins of test input and test output can be shared regardless of the number of the function modules. Therefore, the number of external pins can be reduced. On the other hand, the first method has a disadvantage in that the test time becomes long by the number of times of repetition of the test. As the number of the function modules increases, the test time becomes longer.
A second method is a method of conducting tests of a plurality of function modules in parallel. This method has an advantage in that the overall test time is as short as the test time of one function module regardless of the number of the function modules and the test time becomes shorter than the first method. On the other hand, the second method has a disadvantage in that the number of the test input and output pins increases depending on the number of the function modules because simultaneous input and output of a plurality of the function modules are needed.
For example, in a semiconductor device including four function modules M1 to M4 having the same function as shown in FIG. 1, test inputs 1 to 4 and test outputs 1 to 4 are needed for the function modules M1 to M4, respectively. For the test inputs 1 to 4 and test outputs 1 to 4, test input and output pins are needed. In the case where the test time required to test respective function modules is short and the number of input and output pins is small, therefore, a very great problem is not posed in this method. In the case where a large number of function modules having a complicated function are mounted, however, the test time and the number of input and output pins which are needed become enormous, and a great problem is posed.
As heretofore described, the conventional method of testing a plurality of function modules having the same function included in a semiconductor device causes an inconvenience that the number of input and output pins for test is small but the test time becomes long, or the test time becomes short but the number of input and output pins for test increases. It has been impossible to satisfy only advantages of both methods while avoiding disadvantages of those methods.
An object of the present invention is to provide a circuit, semiconductor device, and function module test method which realize the shortening of the test time, in the test of a semiconductor device including a plurality of function modules having the same function.
Another object of the present invention is to provide a circuit, semiconductor device, and function module test method which realize reduction of the number of input and output pins for test, in the test of a semiconductor device including a plurality of function modules having the same function.
A feature of the present invention resides in that test inputs and/or outputs are made common, and tests of arbitrarily selected function modules are carried out simultaneously in parallel.
A function module to be tested may be decided to be passed or failed on the basis of results of comparison between a test result of arbitrary at least one function module among a plurality of function modules included in the semiconductor device and test results of other function modules.
In accordance with an aspect of the present invention, there is provided a circuit for testing a plurality of function modules having same function to be incorporated into a device, the circuit including: a test module selection circuit for receiving a test input vector via a test input terminal, and selecting, out of a plurality of the function modules, one or more function modules to be supplied with the test input vector according to an input selection signal; a synchronous input circuit for receiving the test input vector from the test module selection circuit, and supplying the test input vector synchronously to the function modules selected by the test module selection circuit; an output module selection circuit for receiving test results outputted as a sequel of tests carried out simultaneously in parallel in the function modules supplied with the test input vector by the synchronous input circuit, and selecting one or more test results out of the outputted test results according to an output selection signal; and a comparison circuit for receiving one or more test results of tests carried out in the function modules selected by the test module selection circuit, comparing selected test result selected by said output module selection circuit with other test results, and outputting a result of the comparison via a comparison result output terminal.
The test input terminal may be one in number.
The synchronous input circuit preferably supplies the test input vector to the selected function modules so as to conduct tests of the function modules simultaneously in parallel, finish the test simultaneously, and output test results simultaneously.
The comparison result output terminal may be one in number.
The comparison circuit may give a decision of coincidence provided that all test results inputted thereto coincide with each other.
The output module selection circuit may include a test result hold circuit for holding tests results outputted from the function modules, and the comparison circuit may give the decision by using the test results held in the test result hold circuit.
The comparison circuit may output results of pass/fail decisions respectively for one or more test results of tests executed in the selected function modules, via a plurality of comparison result output terminals, respectively.
The selected test result may be judged to be passed or not by an external IC tester.
The IC tester compares successively test results of tests carried out in selected function modules with a prescribed expected value, and supplies the test results to the comparison circuit.
In accordance with another aspect of the present invention, there is provided a method of testing a plurality of function modules having same function to be incorporated into a device, the method comprising the steps of: (a) receiving one test input vector, and selecting, out of a plurality of the function modules, one or more function modules to be supplied with the test input vector according to an input selection signal; (b) receiving the test input vector, and supplying the test input vector synchronously to the selected function modules; (c) receiving test results outputted as a sequel of tests carried out simultaneously in parallel in the function modules supplied with the test input vector, and selecting, out of the outputted test results, one or more test according to an output selection signal; and (d) receiving one or more test results of tests carried out in the function modules selected in the step (a), comparing selected test result selected in the step (c) with other test results, and outputting one or more comparison results.
In accordance with another aspect of the present invention, there is provided a semiconductor device incorporating a circuit for testing a plurality of function modules having same function to be incorporated into the device, the semiconductor device including: a test module selection circuit for receiving a test input vector via a test input terminal, and selecting, out of a plurality of the function modules, one or more function modules to be supplied with the test input vector according to an input selection signal; a synchronous input circuit for receiving the test input vector from the test module selection circuit, and supplying the test input vector synchronously to the function modules selected by the test module selection circuit; an output module selection circuit for receiving test results outputted as a sequel of tests carried out simultaneously in parallel in the function modules supplied with the test input vector by the synchronous input circuit, and selecting one or more test results out of the outputted test results according to an output selection signal; and a comparison circuit for receiving one or more test results of tests carried out in the function modules selected by the test module selection circuit, comparing selected test result selected by the output module selection circuit with other test results, and outputting at least one result of the comparison via a comparison result output terminal.
Other features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings.